Hi, for those that are running the RP2350 with PSRAM, these are some of my findings when running
a ESP32-PSRAM64H in Quad mode at 150 MHz (stable as far as I can tell, doing multiple validation passes).
The timings for this configuration are not excessively optimized and the manufacturer's timing requirements are respected (except frequency, which is 144 MHz max per the datasheet). Max select can be increased to the maximum of 32 (enough to read a 1024 page in a single command) but I have found that it does not make much of a difference, usually being within run to run variance, and if you have another core accessing the XIP it will not make a difference.
Timings:
Cooldown: 1
PageBreak: 1024 bytes
Max select (1): 18
Min deselect (2): 8
RX Delay (3): 2
Clock divisor: 1
Select Setup delay: 0
Select hold (4): 1
Notes:
(1) Respects the maximum select time set by the manufacturer of 8 microseconds
(2) Respects the minimum refresh time set by the manufacturer of 50 ns
(3) With very short PSRAM traces (e.g. opposite side of the RP2350 chip) this might be reduced to 1
(4) This might be reduced to 0 if your paths are clean, but performance increase in negligible.
On the topic of performance, I ran some sequential RW tests (all validated) with different data size.
Write performance when mapping the PSRAM to the cached region of XIP is horrible and no amount of
fiddling could improve them much more than this without going into unsafe territory and memory corruption.
Read performance grows steadily from u8 to u32 reads, and after that it stabilizes for the rest of the
read types (u64 and u128, although u128 does experience a small growth, probably due to compiler
optimizations). Write performance is proportional to type size, although gains start decreasing after u64
writes.
For u8 and u16 accesses, the Read performance hit between Cached and Uncached accesses makes it worth it to evaluate wether to use the Cached region (with lowered Write performance) or the Uncached region (with lowered Read performance). A third option is to use Cached reads and Uncached writes, but then you are left to do cache maintenance and invalidation at your own risk.
If the majority of you application is going to use u32 accesses or above, then it probably isn't worth it to
use anything other than the Uncached region (<5% Read performance decrease).
Sequential RW performance:
I also run some random access tests by accessing 1024 randomly generated addresses in chunks of 1024 bytes (1 kiB), emitting accesses of different size (u8 to u128). In this case the write performance is consitent all around the board (17 MB/s Cached, 47 MB/s Uncached), within run to run variance for all access types. Uncached read performance increases from u8 to u32 and then becomes stable at around 42 MB/s. Cached read performance is highly dependant on the contention over the XIP bus and will vary between 30 MB/s to 50 MB/s, so it is not reliable. With all this, the best strategy here appears to be using Uncached accesses for predictable performance.
Random RW performance:
a ESP32-PSRAM64H in Quad mode at 150 MHz (stable as far as I can tell, doing multiple validation passes).
The timings for this configuration are not excessively optimized and the manufacturer's timing requirements are respected (except frequency, which is 144 MHz max per the datasheet). Max select can be increased to the maximum of 32 (enough to read a 1024 page in a single command) but I have found that it does not make much of a difference, usually being within run to run variance, and if you have another core accessing the XIP it will not make a difference.
Timings:
Cooldown: 1
PageBreak: 1024 bytes
Max select (1): 18
Min deselect (2): 8
RX Delay (3): 2
Clock divisor: 1
Select Setup delay: 0
Select hold (4): 1
Notes:
(1) Respects the maximum select time set by the manufacturer of 8 microseconds
(2) Respects the minimum refresh time set by the manufacturer of 50 ns
(3) With very short PSRAM traces (e.g. opposite side of the RP2350 chip) this might be reduced to 1
(4) This might be reduced to 0 if your paths are clean, but performance increase in negligible.
On the topic of performance, I ran some sequential RW tests (all validated) with different data size.
Write performance when mapping the PSRAM to the cached region of XIP is horrible and no amount of
fiddling could improve them much more than this without going into unsafe territory and memory corruption.
Read performance grows steadily from u8 to u32 reads, and after that it stabilizes for the rest of the
read types (u64 and u128, although u128 does experience a small growth, probably due to compiler
optimizations). Write performance is proportional to type size, although gains start decreasing after u64
writes.
For u8 and u16 accesses, the Read performance hit between Cached and Uncached accesses makes it worth it to evaluate wether to use the Cached region (with lowered Write performance) or the Uncached region (with lowered Read performance). A third option is to use Cached reads and Uncached writes, but then you are left to do cache maintenance and invalidation at your own risk.
If the majority of you application is going to use u32 accesses or above, then it probably isn't worth it to
use anything other than the Uncached region (<5% Read performance decrease).
Sequential RW performance:
Code:
-------------------------------------|8 MB RW Throughput tests for < u8 >|-------------------------------------| | Cached | Uncached |-------------------------------------| Read | 24.40 MB/s | 17.37 MB/s ||------------------------------------| Write | 7.23 MB/s | 10.26 MB/s |--------------------------------------------------------------------------|8 MB RW Throughput tests for <u16 >|-------------------------------------| | Cached | Uncached |-------------------------------------| Read | 33.09 MB/s | 27.63 MB/s ||------------------------------------| Write | 9.87 MB/s | 17.79 MB/s |--------------------------------------------------------------------------|8 MB RW Throughput tests for <u32 >|-------------------------------------| | Cached | Uncached |-------------------------------------| Read | 42.38 MB/s | 40.20 MB/s ||------------------------------------| Write | 12.71 MB/s | 28.38 MB/s |--------------------------------------------------------------------------|8 MB RW Throughput tests for <u64 >|-------------------------------------| | Cached | Uncached |-------------------------------------| Read | 42.81 MB/s | 41.01 MB/s ||------------------------------------| Write | 13.98 MB/s | 34.72 MB/s |--------------------------------------------------------------------------|8 MB RW Throughput tests for <u128>|-------------------------------------| | Cached | Uncached |-------------------------------------| Read | 46.16 MB/s | 42.84 MB/s ||------------------------------------| Write | 14.73 MB/s | 39.94 MB/s |-------------------------------------Random RW performance:
Code:
-------------------------------------| 1 MB RW Random tests for < u8 > |-------------------------------------| | Cached | Uncached |-------------------------------------| Read | 27.99 MB/s | 18.91 MB/s ||------------------------------------| Write | 16.98 MB/s | 47.73 MB/s |--------------------------------------------------------------------------| 1 MB RW Random tests for <u16 > |-------------------------------------| | Cached | Uncached |-------------------------------------| Read | 39.43 MB/s | 30.40 MB/s ||------------------------------------| Write | 16.38 MB/s | 47.73 MB/s |--------------------------------------------------------------------------| 1 MB RW Random tests for <u32 > |-------------------------------------| | Cached | Uncached |-------------------------------------| Read | 38.71 MB/s | 43.16 MB/s ||------------------------------------| Write | 17.09 MB/s | 47.00 MB/s |--------------------------------------------------------------------------| 1 MB RW Random tests for <u64 > |-------------------------------------| | Cached | Uncached |-------------------------------------| Read | 49.79 MB/s | 43.43 MB/s ||------------------------------------| Write | 16.70 MB/s | 47.86 MB/s |--------------------------------------------------------------------------| 1 MB RW Random tests for <u128> |-------------------------------------| | Cached | Uncached |-------------------------------------| Read | 48.76 MB/s | 41.28 MB/s ||------------------------------------| Write | 17.31 MB/s | 47.83 MB/s |-------------------------------------Statistics: Posted by AnonBug — Sat Apr 12, 2025 3:23 pm