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Troubleshooting • Re: Pi5 more susceptible to glitches on Vdd

I would try adding some capacitance between the series pass FET's (Q1) drain and gate which will increase the turn on (and off) times and reduce the initial inrush current to the super cap (and all the other decoupling caps).

However check if there is a maximum rise time specified for the supply to the GPS module as a slow supply rise may not guarantee correct power on reset.

PeterO

Statistics: Posted by PeterO — Mon Aug 05, 2024 4:28 pm



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