Thanks for your messages.
![:)]( "Smile")
No, I do not wear a strange thing on the top of my head, but you gave me the idea of being like a silver hat ![;)]( "Wink")
I have looked the CM4, but I don't see any information on the encryption part in the CPU, The ARM Cortex-A72
I searched for this architecture and only found AMD that do the RAM data bus encryption/decryption from the CPU.
I don't know if it is possible on authors.
Furthermore, I put the idea in this image :![Image]()
https://drive.google.com/file/d/1KMkiFs ... sp=sharing
As other connectors or devices are not needed, it is better to not having something that it is not used.
If it can reduce the dimensions and/or prices, it will be nice.
And it is like the zero trust, every thing is defined for something.
It is the same idea as Hippy, so the ROM, RAM, LAN, and hard disk are encrypted.
The ROM is encrypted when it is bult with the same Key that we give to the ASIC.
The ROM can be copied into RAM with DMA and then the ASIC in the CPU will decrypt the data and deliver for treatment.
After that, the data are encrypted and stored/send via DMA.
Or not encrypted and send to the screen or USB device.
They can only be clear data sent and received from/to the I/O and from/to the CPU directly.
The user can have access to his data on screen or into a USB device.
For example, a network administrator can give the same key for all the devices on configuration stage, so they can communicate on the network. The end user does not have the key.
He only has access to his folder and internal web resources.
The internet request pass through a central FW that decrypt and encrypt the trafic.
As I see, the only way to have unencrypted data is on local access.
If an application want's to send data on internet, thy will be or blocked or encrypted if the FW fails.
Is this correct ?
No, I do not wear a strange thing on the top of my head, but you gave me the idea of being like a silver hat 
I have looked the CM4, but I don't see any information on the encryption part in the CPU, The ARM Cortex-A72
I searched for this architecture and only found AMD that do the RAM data bus encryption/decryption from the CPU.
I don't know if it is possible on authors.
Furthermore, I put the idea in this image :
https://drive.google.com/file/d/1KMkiFs ... sp=sharing
As other connectors or devices are not needed, it is better to not having something that it is not used.
If it can reduce the dimensions and/or prices, it will be nice.
And it is like the zero trust, every thing is defined for something.
It is the same idea as Hippy, so the ROM, RAM, LAN, and hard disk are encrypted.
The ROM is encrypted when it is bult with the same Key that we give to the ASIC.
The ROM can be copied into RAM with DMA and then the ASIC in the CPU will decrypt the data and deliver for treatment.
After that, the data are encrypted and stored/send via DMA.
Or not encrypted and send to the screen or USB device.
They can only be clear data sent and received from/to the I/O and from/to the CPU directly.
The user can have access to his data on screen or into a USB device.
For example, a network administrator can give the same key for all the devices on configuration stage, so they can communicate on the network. The end user does not have the key.
He only has access to his folder and internal web resources.
The internet request pass through a central FW that decrypt and encrypt the trafic.
As I see, the only way to have unencrypted data is on local access.
If an application want's to send data on internet, thy will be or blocked or encrypted if the FW fails.
Is this correct ?
Statistics: Posted by 11Seraphin11 — Fri Jul 26, 2024 2:37 pm